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   為擴展工業操控領域的中心功用并豐盛其接口操作，本文提出一種根據AT91RlM9200微操控器的智能化多總線測控模塊的規劃方法以及體系的構建架構，并給出閃現接口的軟、硬件處理計劃。該模塊運用嵌入式體系處理了閃現接口結束困難的問題，具有較好的實踐運用前景。

導語
MultiBus―CPU模塊是根據AT91RM9200微操控器的智能化多總線測控模塊。該CPU模塊首要結束對下位機的操控，并建立根據Modbus―RTU總線協議的總線通訊體系結構，讓體系設備能夠無縫接入根據Modbus―RTU方法的總線體系，牢靠、實時、精確地結束工業現場數據收集、信號輸出等功用；一同，供給規范視頻接口用于閃現16位色圖畫，供給規范音頻輸入輸出接口用于結束錄放音功用。該模塊作為嵌入式開發環境的中心，可結束人機界面的交互操作和閃現、海量數據的存儲、多串口、多USB口、音頻信號輸入輸出、以太網口等接口；作業Linux操作體系，能夠快速建立面向運用的嵌入式運用體系。

1 MultiBus―CPU模塊軟件規劃計劃
為了滿足實踐運用對實時性的要求，MultiBus―CPU模塊軟件選用了Linux2．6．21操作體系。其間，Linux2．6的內核任務能夠被搶占，這一特性使得Linux2．6內核適用于實時體系和嵌入式體系中。驅動程序在Linux環境下進行開發，運用層選用規范的通訊協議――Modbus協議，操控設備能夠連成工業網絡進行會集監控。經過一同的Modbus接口，MultiBus―CPU模塊與擴展下位機均可作為對等設備在工業網絡中進行對話，使得各個設備無縫接入到工業操控網絡中。MultiBus―CPU模塊支撐現階段工業測控體系中最常用的以太網(UDP)通訊及RS485通訊協議。因而，本模塊在與其他功用模塊進行通訊時，選用Modbus―RTU數據通訊方法，運用以太網(UDP)／RS485總線進行數據的發送與接納，結束對各功用模塊的會集監控。軟件全體結構如圖l所示。

2 MulitiBus―CPU模塊硬件規劃計劃
硬件規劃原理圖如圖2所示。MultiBus―CPU模塊選用Atmel公司的AT91RM9200為主處理器，融合了ARM920T ARM Thumb處理器。其作業于180 MHz時功用高達200 MIPS；具有存儲器處理單元，能夠作業Linux等實時操作體系；具有10／100 Base―T型以太網卡接口，只需外擴一個PHY即可結束以太網通訊；具有USB 2．O全速(12 Mb／s)主機雙端口，能夠擴展鍵盤、鼠標、U盤等規范外設。

主處理器AT91RM9200具有5個串口：1個DEBUG串口，規劃為RS232接口，能夠直接聯接PC的串口進行調試；1個RS485接口，能夠與其他功用模塊的RS485接口組成網絡；其他3個串口均規劃為RS232接口。
經過CPU模塊的外部總線和Epson公司的S1D13506閃現芯片擴展了一個VGA接口，分辨率為640×480，256色。IS41LVl6100為其供給獨立顯存，容量為1M×16位，支撐EDO PAGE方法。
GL850A芯片是一個低功耗的USB 2．0 HUB操控器，AT91RM9200本身的USB HOST接口經過GL850A芯片擴展為4個USB HOST接口。
DS3231是精度非常高的I2C集成實時時鐘。其精度在0～40℃內高達±2 ppm，在-40～85℃內精度可達±3．5ppm；板載電池，掉電后能夠堅持時刻；可為體系供給秒、分、小時、日、日期、月、年等信息，具有主動閏年調整功用。
WM8731是一個低功耗網絡音頻編解碼器(CO-DEC)，具有輸出功率放大器和可編程采樣速率設定功用。WM8731芯片經過I2S接口與CPU聯接，為CPU模塊擴展了音頻信號的輸入輸出接口，使體系具有音頻采樣功用，音頻信號數字化后能夠經過以太網傳送。
DM9161為10／100M快速以太網物理層單芯片收發器，H1102為網絡隔絕變壓器，用于結束10／100M自適應的牢靠網絡傳輸功用。
MultiBus―CPU模塊經過增加閃現操控芯片及其驅動結束了閃現接口，體系作業信息能夠直接經過VGA閃現器閃現出來，大大提高了人機交互的可操作性。

3 閃現模塊硬件規劃計劃
3．1 接口芯片挑選
接口芯片選用Epson公司出產的大規模閃現操控器S1D13506。它是以SEDl354操控器為基礎發展起來的具有更多功用的LCD閃現操控器，支撐全類型、大規模的LCD及CRT／TV閃現器。S1D13506內置RAMDAC(Random Access Memory Digital-to-Analog Converter，隨機數模轉換記憶體)硬件X-Y軸轉置二維加速器，共有114個寄存器，能夠活絡地設置各種不同的閃現方法。
3．2 接口硬件規劃
S1D13506與處理器的接口選用通用類型總線(包含數據總線、地址總線、操控總線)。接口界說如表1所列。芯片所用像素時鐘CLKl、CLK2是由同步信號發生器ICSl523來供給的，外接1M×16位的EDO-DRAM IS41LVl6100。

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